Electrical dipole having a comparatively low direct current and a comparatively high alternating current impedance



y 30, 1957 J. .1. RONGEN EI'AL 2,801,346

ELECTRICAL DIPOLE HAVING A COMPARATIVELY LOW DIRECT CURRENT AND A COMPARATIVELY HIGH ALTERNATING CURRENT IMPEDANCE Filed April 4, 1956 INVENTOR JAcoaus JOHANNES RweeN FENRI HERMAN vm ABBE AGENT United States Patent ELECTRICAL DIPOLE HAVING A COlVIPARA- TIVELY LOW DHQECT CURRENT AND A COMPARATIVELY HIGH ALTERNATING CURRENT IMPEDANCE Jacobus Johannes Rongen and Henri Herman van Abbe,

Eindhoven, Netherlands, assignors, by mesne assignments, to North American Philips Company, Inc., New York, N. Y., a corporation of Delaware Application April 4, 1956, Serial No. 576,171 Claims priority, application Netherlands April 5, 1955 1 Claim. (Cl. 307-885) The present invention relates to an electrical two terminal network having a comparatively low direct current resistance and a comparatively high alternating current impedance. More particularly, the invention relates to a network of the type described utilizing a transistor. The network of the present invention may advantageously be substituted for a heavy and clumsy choke coil, for example for suppressing voltage variations produced across an electrical load-impedance by supply voltage and/ or load-impedance variations.

The present invention has for its object to provide an advantageous electrical two terminal network by utilization of the fact that the alternating current impedance of a transistor between its emitter and collector electrodes largely exceeds its direct current resistance, and by utilization of suitable alternating current inverse feedback and direct voltage feedback.

In accordance with the present invention, the two terminal network comprises the series-combination of the collector-emitter path of a transistor and of a first resistor, which is connected to the emitter of the transistor and the value of which is at least several times that of the internal emitter resistance of said transistor. The base of the transistor is connected to its collector through a second large resistor, and said base is connected to the end of the first resistor remote from the emitter through a capacitor, the impedance of said capacitor with respect to any voltage variations being at least several times smaller than that of the first resistor. The arrangement is such that the base of the transistor is biased in the conducting direction by a direct voltage applied across the network, via the second resistor, and that, as regards the said voltage variations, the network exhibits an impedance considerably larger than its direct current resistance.

In order that the invention may be readily carried into effect, an embodiment thereof will now be described with reference to the accompanying drawing, in which:

Fig. l is a schematic diagram of an embodiment of a circuit arangement comprising an embodiment of the two terminal network of the present invention; and

Fig. 2 is a graphical presentation provided to aid in explaining the operation of the circuit arrangement of Fig. 1.

The circuit arrangement shown in Fig. 1 comprises a supply source delivering a direct voltage V with a superimposed variable or ripple voltage e and having an internal resistance R1. A load R1, which is bypassed by a capacitor C, is connected across the supply source via the emitter-collector path of a transistor T and a resistor Re connected in series with said transistor. The end of the resistor Re remote from the emitter electrode of the transistoris connected through a large capacitor, for example an electrolytic capacitor Ceb, to the base of the said transistor. The base of the transistor is con- 7 2,801,346 Patented July 30, 1957 nected to the collector of the said transistor through a resistor Rb.

If the capacitor (3,, and the resistor R were not present, the ratio S between the ripple voltage across the ends of the load resistor R1 and the ripple voltage e at the input would be Rs represents the so-called differential resistance and S represents the suppression factor of the two terminal netwherein 1- is the output resistance and a is the current amplification of the transistor in grounded emitterconnection.

Connecting the capacitor Cab in the circuit is equivalent to short-circuiting the alternating voltage between the emitter and the base of the transisor. Instead of being approximately equal to b] b said alternating voltage now becomes equal to The graph of Fig. 2 represents the load current i of the transistor T as a function of the emitter-collector voltage V with the base-current i as a parameter. It is seen that for a given load resistance R1 and a given basecurrent i and with an equally given direct current voltage V with a superimposed ripple voltage e, the values of i and V in the absence of the condenser C vary between i0, and 1'0 and between Vea and Vce, respectively. If the condenser Ceb is connected in the circuit, it has the effect of maintaining the emitter current i practically constant, so that, also due to the interconnected resistance R which is chosen larger than the emitter resistance r the transistor behaves with respect to the ripple voltage 2 practically as a transistor with grounded base electrode and features a much larger differential resistance Rs, as well as a much larger factor S. Indeed, as is well known, the right-hand branches of the curves i =f(V for a constant i are much flatter than those of the corresponding curves for a constant i (Fig. 2).

If, in this circuit, the load resistance R1 slightly varies, for example from R1 to R1, the working-point of the transistor, particularly its collector-emitter voltage V shifts considerably, for example from point A to point B (Fig. 2). This is sometimes undesirable and, particularly in the case of transistors with a low a, may involve ex cessive collector dissipation.

The resistor R brings about a current inverse-feedback with respect to alternating voltages only. Since the base of the transistor is connected to its collector through the resistor R the circuit arrangement has a much lower internal resistance with regard to current variations which are slow relatively to the time constant of the circuit R-C where R comprises the parallel-connected resistances Rb and Rx, which is in turn equal to the sum of R (1+a') and of the emitter-base direct current resistance. If the voltage between the emitter and collector, and consequently also between the emitter and base increases, the base-current increases due to the direct current feedback across the resistor Rb, so that the output current likewise increases. In the two terminal network according to the invention, 13 should be maintained as low as possible, since it is traversed by the supply current and, if its value is too high, it reduces the .etfficiency of the network excessively. Furthermore, the direct voltage across R should not be too high, since otherwise the direct voltage across C also increases and this capacitor can no longer be of a low voltage electrolytic type. Thus, R is given a compromise value whereby it is at least several times larger than the internal emitter resistance r of the transistor. R is determined by the required base-current i and its value is comparable to that of the collector resistance r It should not be too high, since only a low voltage is available across it. With respect to alternating voltages, R is connected substantially in parallel with the transistor. If the a of the transistor is small, R should also be small, in order that the transistor be able to deliver the required direct current, and this low resistance considerably reduces the suppression factor S. In the circuit arrangement described, the network according to the inven- 30 tion provides an excellent smoothing of the supply current with respect to load impedance variations.

The transistor shown in Fig. 1 is a junction transistor of pnp type.

While the invention has been described by means of a specific example and in a specific embodiment, we do not wish to be limited thereto, for obvious modifications will occur to those skilled in the art without departing from the spirit and scope of the invention.

What is claimed is:

An electrical two terminal network, characterized in that it comprises the series-combination of the collectorcmitter path of a transistor and of a resistor, which is connected to the emitter of this transistor and the value of which at least several times exceeds that of the internal emitter-resistance of the transistor, and in that it furthermore comprises a further large resistor through which the base of the transistor is connected to the collectcr, and a capacitor through which said base is connected to the end of the first resistor remote from the emitter, the impedance of said capactior with respect to any voltage variations being at least several times smaller than that of' he first resistor, the arrangement being such that the base of the transistor is biased in the conducting direction by a direct voltage applied across the network, via the second resistor, and that, as regards the said voltage variations, the network exhibits an impedance considerably larger than its direct current resistance.

References Cited in the tile of this patent UNITED STATES PATENTS 2,585,078 Barney Feb. 12, 1952 

